PLDA and HPE Collaborate to Develop Gen-Z Semiconductor IP

HPE and PLDA announced a collaboration to meet the challenges of next-generation connectivity for advanced workloads. Gen-Z is a new open interconnect protocol and connector developed by the Gen-Z Consortium to solve the challenges associated with processing and analyzing huge amounts of data in real time.

Two companies will be working together to develop Gen-Z semiconductor IP designed to the Gen-Z Core Specification 1.0. Announced in February 2018, the Core Specification 1.0 enables the industry to begin the development of products that incorporate the Gen-Z interconnect protocol.

Creating one standard interconnect is important because it allows any component to talk to any other component as if it were communicating with its own local memory using simple commands. PLDA’s Gen-Z IP will provide the building blocks to create high performance low latency solutions where every device in the system is connected at the speed of memory.

With Gen-Z, the industry can simultaneously support memory, I/O, storage and different forms of compute on a common disaggregated, composable or memory-semantic fabric (or interconnect). Gen-Z reflects a broader industry trend that recognizes the importance and role of open standards in providing a level playing field to promote adoption, innovation and choice. By enabling technologists to collaborate and contribute to an open and competitive ecosystem, Gen-Z will help the industry fundamentally change how the world thinks about computing.

With Gen-Z, the industry can combine fast persistent memory, DRAM and task-specific processing and accelerators on a fast memory fabric without legacy constraints or device hierarchies. This approach optimizes and simplifies system configurations to deliver optimal performance tailored to specific user demands simply and efficiently with better performance at reduced cost.